[-]
[+]
|
Changed |
_service:tar_git:kernel-adaptation-pine64.spec
|
|
[-]
[+]
|
Changed |
_service
^
|
@@ -2,7 +2,7 @@
<service name="tar_git">
<param name="url">https://github.com/sailfish-on-dontbeevil/kernel-adaptation-pine64.git</param>
<param name="branch">main</param>
- <param name="revision">6.1.0+git2</param>
+ <param name="revision">6.1.0+git3</param>
<param name="token"/>
<param name="debian">N</param>
<param name="dumb">N</param>
|
[-]
[+]
|
Deleted |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git2.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.c
^
|
@@ -1,793 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
- * All rights reserved.
- * Author: Yong Deng <yong.deng@magewell.com>
- */
-
-#include <linux/of.h>
-
-#include <media/v4l2-device.h>
-#include <media/v4l2-event.h>
-#include <media/v4l2-ioctl.h>
-#include <media/v4l2-mc.h>
-#include <media/videobuf2-dma-contig.h>
-#include <media/videobuf2-v4l2.h>
-
-#include "sun6i_csi.h"
-#include "sun6i_video.h"
-
-/* This is got from BSP sources. */
-#define MIN_WIDTH (32)
-#define MIN_HEIGHT (32)
-#define MAX_WIDTH (4800)
-#define MAX_HEIGHT (4800)
-
-/* Helpers */
-
-static struct v4l2_subdev *
-sun6i_video_remote_subdev(struct sun6i_video *video, u32 *pad)
-{
- struct media_pad *remote;
-
- remote = media_pad_remote_pad_first(&video->pad);
-
- if (!remote || !is_media_entity_v4l2_subdev(remote->entity))
- return NULL;
-
- if (pad)
- *pad = remote->index;
-
- return media_entity_to_v4l2_subdev(remote->entity);
-}
-
-/* Format */
-
-static const u32 sun6i_video_formats[] = {
- V4L2_PIX_FMT_SBGGR8,
- V4L2_PIX_FMT_SGBRG8,
- V4L2_PIX_FMT_SGRBG8,
- V4L2_PIX_FMT_SRGGB8,
- V4L2_PIX_FMT_SBGGR10,
- V4L2_PIX_FMT_SGBRG10,
- V4L2_PIX_FMT_SGRBG10,
- V4L2_PIX_FMT_SRGGB10,
- V4L2_PIX_FMT_SBGGR12,
- V4L2_PIX_FMT_SGBRG12,
- V4L2_PIX_FMT_SGRBG12,
- V4L2_PIX_FMT_SRGGB12,
- V4L2_PIX_FMT_YUYV,
- V4L2_PIX_FMT_YVYU,
- V4L2_PIX_FMT_UYVY,
- V4L2_PIX_FMT_VYUY,
- V4L2_PIX_FMT_RGB565,
- V4L2_PIX_FMT_RGB555,
- V4L2_PIX_FMT_NV12_16L16,
- V4L2_PIX_FMT_NV12,
- V4L2_PIX_FMT_NV21,
- V4L2_PIX_FMT_YUV420,
- V4L2_PIX_FMT_YVU420,
- V4L2_PIX_FMT_NV16,
- V4L2_PIX_FMT_NV61,
- V4L2_PIX_FMT_YUV422P,
- V4L2_PIX_FMT_RGB565,
- V4L2_PIX_FMT_RGB565X,
- V4L2_PIX_FMT_JPEG,
-};
-
-static bool sun6i_video_format_check(u32 format)
-{
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(sun6i_video_formats); i++)
- if (sun6i_video_formats[i] == format)
- return true;
-
- return false;
-}
-
-/* Video */
-
-static void sun6i_video_buffer_configure(struct sun6i_csi_device *csi_dev,
- struct sun6i_csi_buffer *csi_buffer)
-{
- csi_buffer->queued_to_csi = true;
- sun6i_csi_update_buf_addr(csi_dev, csi_buffer->dma_addr);
-}
-
-static void sun6i_video_configure(struct sun6i_csi_device *csi_dev,
- struct v4l2_fwnode_endpoint *vep)
-{
- struct sun6i_video *video = &csi_dev->video;
- struct sun6i_csi_config config = { 0 };
-
- config.pixelformat = video->format.fmt.pix.pixelformat;
- config.code = video->mbus_code;
- config.field = video->format.fmt.pix.field;
- config.width = video->format.fmt.pix.width;
- config.height = video->format.fmt.pix.height;
-
- sun6i_csi_update_config(csi_dev, &config, vep);
-}
-
-/* Queue */
-
-static int sun6i_video_queue_setup(struct vb2_queue *queue,
- unsigned int *buffers_count,
- unsigned int *planes_count,
- unsigned int sizes[],
- struct device *alloc_devs[])
-{
- struct sun6i_csi_device *csi_dev = vb2_get_drv_priv(queue);
- struct sun6i_video *video = &csi_dev->video;
- unsigned int size = video->format.fmt.pix.sizeimage;
-
- if (*planes_count)
- return sizes[0] < size ? -EINVAL : 0;
-
- *planes_count = 1;
- sizes[0] = size;
-
- return 0;
-}
-
-static int sun6i_video_buffer_prepare(struct vb2_buffer *buffer)
-{
- struct sun6i_csi_device *csi_dev = vb2_get_drv_priv(buffer->vb2_queue);
- struct sun6i_video *video = &csi_dev->video;
- struct v4l2_device *v4l2_dev = &csi_dev->v4l2.v4l2_dev;
- struct vb2_v4l2_buffer *v4l2_buffer = to_vb2_v4l2_buffer(buffer);
- struct sun6i_csi_buffer *csi_buffer =
- container_of(v4l2_buffer, struct sun6i_csi_buffer, v4l2_buffer);
- unsigned long size = video->format.fmt.pix.sizeimage;
-
- if (vb2_plane_size(buffer, 0) < size) {
- v4l2_err(v4l2_dev, "buffer too small (%lu < %lu)\n",
- vb2_plane_size(buffer, 0), size);
- return -EINVAL;
- }
-
- vb2_set_plane_payload(buffer, 0, size);
-
- csi_buffer->dma_addr = vb2_dma_contig_plane_dma_addr(buffer, 0);
- v4l2_buffer->field = video->format.fmt.pix.field;
-
- return 0;
-}
-
-static void sun6i_video_buffer_queue(struct vb2_buffer *buffer)
-{
- struct sun6i_csi_device *csi_dev = vb2_get_drv_priv(buffer->vb2_queue);
- struct sun6i_video *video = &csi_dev->video;
- struct vb2_v4l2_buffer *v4l2_buffer = to_vb2_v4l2_buffer(buffer);
- struct sun6i_csi_buffer *csi_buffer =
- container_of(v4l2_buffer, struct sun6i_csi_buffer, v4l2_buffer);
- unsigned long flags;
-
- spin_lock_irqsave(&video->dma_queue_lock, flags);
- csi_buffer->queued_to_csi = false;
- list_add_tail(&csi_buffer->list, &video->dma_queue);
- spin_unlock_irqrestore(&video->dma_queue_lock, flags);
-}
-
-static int sun6i_video_start_streaming(struct vb2_queue *queue,
- unsigned int count)
-{
- struct sun6i_csi_device *csi_dev = vb2_get_drv_priv(queue);
- struct sun6i_video *video = &csi_dev->video;
- struct video_device *video_dev = &video->video_dev;
- struct sun6i_csi_async_subdev *casd;
- struct sun6i_csi_buffer *buf;
- struct sun6i_csi_buffer *next_buf;
- struct v4l2_subdev *subdev;
- unsigned long flags;
- int ret;
-
- video->sequence = 0;
-
- ret = video_device_pipeline_alloc_start(video_dev);
- if (ret < 0)
- goto error_dma_queue_flush;
-
- if (video->mbus_code == 0) {
- ret = -EINVAL;
- goto error_media_pipeline;
- }
-
- subdev = sun6i_video_remote_subdev(video, NULL);
- if (!subdev) {
- ret = -EINVAL;
|
[-]
[+]
|
Deleted |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git2.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_video.h
^
|
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
- * All rights reserved.
- * Author: Yong Deng <yong.deng@magewell.com>
- */
-
-#ifndef __SUN6I_VIDEO_H__
-#define __SUN6I_VIDEO_H__
-
-#include <media/v4l2-dev.h>
-#include <media/videobuf2-core.h>
-
-struct sun6i_csi_device;
-
-struct sun6i_video {
- struct video_device video_dev;
- struct vb2_queue queue;
- struct mutex lock; /* Queue lock. */
- struct media_pad pad;
-
- struct list_head dma_queue;
- spinlock_t dma_queue_lock; /* DMA queue lock. */
-
- struct v4l2_format format;
- u32 mbus_code;
- unsigned int sequence;
-};
-
-int sun6i_video_setup(struct sun6i_csi_device *csi_dev);
-void sun6i_video_cleanup(struct sun6i_csi_device *csi_dev);
-
-void sun6i_video_frame_done(struct sun6i_csi_device *csi_dev);
-
-#endif /* __SUN6I_VIDEO_H__ */
|
[-]
[+]
|
Deleted |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git2.tar.bz2/patches/0018-ov5640-gain.patch
^
|
@@ -1,93 +0,0 @@
-From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-To: linux-media@vger.kernel.org
-Cc: Jacopo Mondi <jacopo.mondi@ideasonboard.com>,
- Sakari Ailus <sakari.ailus@iki.fi>,
- Paul Elder <paul.elder@ideasonboard.com>,
- Steve Longerbeam <slongerbeam@gmail.com>,
- hugues.fruchet@st.com, prabhakar.mahadev-lad.rj@bp.renesas.com,
- aford173@gmail.com, festevam@gmail.com, eddy.khan@vergesense.com,
- paul.kocialkowski@bootlin.com, eugen.hristev@microchip.com
-Subject: [PATCH v2] media: ov5640: Fix analogue gain control
-Date: Mon, 28 Nov 2022 10:02:01 +0200 [thread overview]
-Message-ID: <20221128080201.15104-1-laurent.pinchart@ideasonboard.com> (raw)
-
-From: Paul Elder <paul.elder@ideasonboard.com>
-
-Gain control is badly documented in publicly available (including
-leaked) documentation.
-
-There is an AGC pre-gain in register 0x3a13, expressed as a 6-bit value
-(plus an enable bit in bit 6). The driver hardcodes it to 0x43, which
-one application note states is equal to x1.047. The documentation also
-states that 0x40 is equel to x1.000. The pre-gain thus seems to be
-expressed as in 1/64 increments, and thus ranges from x1.00 to x1.984.
-What the pre-gain does is however unspecified.
-
-There is then an AGC gain limit, in registers 0x3a18 and 0x3a19,
-expressed as a 10-bit "real gain format" value. One application note
-sets it to 0x00f8 and states it is equal to x15.5, so it appears to be
-expressed in 1/16 increments, up to x63.9375.
-
-The manual gain is stored in registers 0x350a and 0x350b, also as a
-10-bit "real gain format" value. It is documented in the application
-note as a Q6.4 values, up to x63.9375.
-
-One version of the datasheet indicates that the sensor supports a
-digital gain:
-
- The OV5640 supports 1/2/4 digital gain. Normally, the gain is
- controlled automatically by the automatic gain control (AGC) block.
-
-It isn't clear how that would be controlled manually.
-
-There appears to be no indication regarding whether the gain controlled
-through registers 0x350a and 0x350b is an analogue gain only or also
-includes digital gain. The words "real gain" don't necessarily mean
-"combined analogue and digital gains". Some OmniVision sensors (such as
-the OV8858) are documented as supoprting different formats for the gain
-values, selectable through a register bit, and they are called "real
-gain format" and "sensor gain format". For that sensor, we have (one of)
-the gain registers documented as
-
- 0x3503[2]=0, gain[7:0] is real gain format, where low 4 bits are
- fraction bits, for example, 0x10 is 1x gain, 0x28 is 2.5x gain
-
- If 0x3503[2]=1, gain[7:0] is sensor gain format, gain[7:4] is coarse
- gain, 00000: 1x, 00001: 2x, 00011: 4x, 00111: 8x, gain[7] is 1,
- gain[3:0] is fine gain. For example, 0x10 is 1x gain, 0x30 is 2x gain,
- 0x70 is 4x gain
-
-(The second part of the text makes little sense)
-
-"Real gain" may thus refer to the combination of the coarse and fine
-analogue gains as a single value.
-
-The OV5640 0x350a and 0x350b registers thus appear to control analogue
-gain. The driver incorrectly uses V4L2_CID_GAIN as V4L2 has a specific
-control for analogue gain, V4L2_CID_ANALOGUE_GAIN. Use it.
-
-If registers 0x350a and 0x350b are later found to control digital gain
-as well, the driver could then restrict the range of the analogue gain
-control value to lower than x64 and add a separate digital gain control.
-
-Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
----
- drivers/media/i2c/ov5640.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
-index 2d740397a5d4..c65c391bc1eb 100644
---- a/drivers/media/i2c/ov5640.c
-+++ b/drivers/media/i2c/ov5640.c
-@@ -3458,7 +3458,7 @@ static int ov5640_init_controls(struct ov5640_dev *sensor)
- /* Auto/manual gain */
- ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
- 0, 1, 1, 1);
-- ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
-+ ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN,
- 0, 1023, 1, 0);
-
- ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
---
|
[-]
[+]
|
Changed |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/kernel-adaptation-simplified/kernel-adaptation-simplified.inc
^
|
@@ -90,11 +90,11 @@
%if 0%{?apply_patches:1}
#Apply any patches
-sh patches/apply-patches.sh %{source_directory}
+#sh patches/apply-patches.sh %{source_directory}
%endif
-make -C %{source_directory} clean
-make -C %{source_directory} defconfig KBUILD_DEFCONFIG=$defconfig_name
+#make -C %{source_directory} clean
+#make -C %{source_directory} defconfig KBUILD_DEFCONFIG=$defconfig_name
%if %{build_Image}
make -C %{source_directory} -j$(nproc) Image
|
[-]
[+]
|
Changed |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/i2c/ov5640.c
^
|
@@ -2960,20 +2960,20 @@
static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
struct v4l2_fract *fi,
- u32 width, u32 height)
+ const struct ov5640_mode_info *mode_info)
{
- const struct ov5640_mode_info *mode;
- enum ov5640_frame_rate rate = OV5640_2_FPS;
+ const struct ov5640_mode_info *mode = mode_info;
+ enum ov5640_frame_rate rate = OV5640_15_FPS;
int minfps, maxfps, best_fps, fps;
int i;
- minfps = ov5640_framerates[OV5640_2_FPS];
- maxfps = ov5640_framerates[OV5640_60_FPS];
+ minfps = ov5640_framerates[OV5640_15_FPS];
+ maxfps = ov5640_framerates[mode->max_fps];
if (fi->numerator == 0) {
fi->denominator = maxfps;
fi->numerator = 1;
- rate = OV5640_60_FPS;
+ rate = mode->max_fps;
goto find_mode;
}
@@ -2994,7 +2994,7 @@
fi->denominator = best_fps;
find_mode:
- mode = ov5640_find_mode(sensor, width, height, false);
+ mode = ov5640_find_mode(sensor, mode->width, mode->height, false);
return mode ? rate : -EINVAL;
}
@@ -3769,7 +3769,7 @@
/* Auto/manual gain */
ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
0, 1, 1, 1);
- ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
+ ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN,
0, 1023, 1, 0);
/* Autofocus */
@@ -3880,6 +3880,7 @@
struct v4l2_subdev_frame_interval_enum *fie)
{
struct ov5640_dev *sensor = to_ov5640_dev(sd);
+ const struct ov5640_mode_info *mode;
struct v4l2_fract tpf;
int ret;
@@ -3888,11 +3889,14 @@
if (fie->index >= OV5640_NUM_FRAMERATES)
return -EINVAL;
+ mode = ov5640_find_mode(sensor, fie->width, fie->height, false);
+ if (!mode)
+ return -EINVAL;
+
tpf.numerator = 1;
tpf.denominator = ov5640_framerates[fie->index];
- ret = ov5640_try_frame_interval(sensor, &tpf,
- fie->width, fie->height);
+ ret = ov5640_try_frame_interval(sensor, &tpf, mode);
if (ret < 0)
return -EINVAL;
@@ -3931,9 +3935,7 @@
mode = sensor->current_mode;
- frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
- mode->width,
- mode->height);
+ frame_rate = ov5640_try_frame_interval(sensor, &fi->interval, mode);
if (frame_rate < 0) {
/* Always return a valid frame interval value */
fi->interval = sensor->frame_interval;
@@ -4121,7 +4123,8 @@
sensor->current_mode =
&ov5640_mode_data[OV5640_MODE_VGA_640_480];
sensor->last_mode = sensor->current_mode;
- sensor->current_link_freq = OV5640_DEFAULT_LINK_FREQ;
+ sensor->current_link_freq =
+ ov5640_csi2_link_freqs[OV5640_DEFAULT_LINK_FREQ];
sensor->ae_target = 28;
|
[-]
[+]
|
Changed |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/Makefile
^
|
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
-sun6i-csi-y += sun6i_video.o sun6i_csi.o
+sun6i-csi-y += sun6i_csi.o sun6i_csi_bridge.o sun6i_csi_capture.o
obj-$(CONFIG_VIDEO_SUN6I_CSI) += sun6i-csi.o
|
[-]
[+]
|
Changed |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
^
|
@@ -1,18 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
- * All rights reserved.
* Author: Yong Deng <yong.deng@magewell.com>
+ * Copyright 2021-2022 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
*/
#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/dma-mapping.h>
#include <linux/err.h>
-#include <linux/fs.h>
#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/ioctl.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
@@ -20,566 +16,56 @@
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/reset.h>
-#include <linux/sched.h>
-#include <linux/sizes.h>
-#include <linux/slab.h>
+#include <media/v4l2-device.h>
#include <media/v4l2-mc.h>
#include "sun6i_csi.h"
+#include "sun6i_csi_bridge.h"
+#include "sun6i_csi_capture.h"
#include "sun6i_csi_reg.h"
-/* Helpers */
+/* ISP */
-/* TODO add 10&12 bit YUV, RGB support */
-bool sun6i_csi_is_format_supported(struct sun6i_csi_device *csi_dev,
- u32 pixformat, u32 mbus_code,
- struct v4l2_fwnode_endpoint *vep)
+int sun6i_csi_isp_complete(struct sun6i_csi_device *csi_dev,
+ struct v4l2_device *v4l2_dev)
{
- /*
- * Some video receivers have the ability to be compatible with
- * 8bit and 16bit bus width.
- * Identify the media bus format from device tree.
- */
- if ((vep->bus_type == V4L2_MBUS_PARALLEL
- || vep->bus_type == V4L2_MBUS_BT656)
- && vep->bus.parallel.bus_width == 16) {
- switch (pixformat) {
- case V4L2_PIX_FMT_NV12_16L16:
- case V4L2_PIX_FMT_NV12:
- case V4L2_PIX_FMT_NV21:
- case V4L2_PIX_FMT_NV16:
- case V4L2_PIX_FMT_NV61:
- case V4L2_PIX_FMT_YUV420:
- case V4L2_PIX_FMT_YVU420:
- case V4L2_PIX_FMT_YUV422P:
- switch (mbus_code) {
- case MEDIA_BUS_FMT_UYVY8_1X16:
- case MEDIA_BUS_FMT_VYUY8_1X16:
- case MEDIA_BUS_FMT_YUYV8_1X16:
- case MEDIA_BUS_FMT_YVYU8_1X16:
- return true;
- default:
- dev_dbg(csi_dev->dev,
- "Unsupported mbus code: 0x%x\n",
- mbus_code);
- break;
- }
- break;
- default:
- dev_dbg(csi_dev->dev, "Unsupported pixformat: 0x%x\n",
- pixformat);
- break;
- }
- return false;
- }
+ if (csi_dev->v4l2_dev && csi_dev->v4l2_dev != v4l2_dev)
+ return -EINVAL;
- switch (pixformat) {
- case V4L2_PIX_FMT_SBGGR8:
- return (mbus_code == MEDIA_BUS_FMT_SBGGR8_1X8);
- case V4L2_PIX_FMT_SGBRG8:
- return (mbus_code == MEDIA_BUS_FMT_SGBRG8_1X8);
- case V4L2_PIX_FMT_SGRBG8:
- return (mbus_code == MEDIA_BUS_FMT_SGRBG8_1X8);
- case V4L2_PIX_FMT_SRGGB8:
- return (mbus_code == MEDIA_BUS_FMT_SRGGB8_1X8);
- case V4L2_PIX_FMT_SBGGR10:
- return (mbus_code == MEDIA_BUS_FMT_SBGGR10_1X10);
- case V4L2_PIX_FMT_SGBRG10:
- return (mbus_code == MEDIA_BUS_FMT_SGBRG10_1X10);
- case V4L2_PIX_FMT_SGRBG10:
- return (mbus_code == MEDIA_BUS_FMT_SGRBG10_1X10);
- case V4L2_PIX_FMT_SRGGB10:
- return (mbus_code == MEDIA_BUS_FMT_SRGGB10_1X10);
- case V4L2_PIX_FMT_SBGGR12:
- return (mbus_code == MEDIA_BUS_FMT_SBGGR12_1X12);
- case V4L2_PIX_FMT_SGBRG12:
- return (mbus_code == MEDIA_BUS_FMT_SGBRG12_1X12);
- case V4L2_PIX_FMT_SGRBG12:
- return (mbus_code == MEDIA_BUS_FMT_SGRBG12_1X12);
- case V4L2_PIX_FMT_SRGGB12:
- return (mbus_code == MEDIA_BUS_FMT_SRGGB12_1X12);
-
- case V4L2_PIX_FMT_YUYV:
- return (mbus_code == MEDIA_BUS_FMT_YUYV8_2X8);
- case V4L2_PIX_FMT_YVYU:
- return (mbus_code == MEDIA_BUS_FMT_YVYU8_2X8);
- case V4L2_PIX_FMT_UYVY:
- return (mbus_code == MEDIA_BUS_FMT_UYVY8_2X8);
- case V4L2_PIX_FMT_VYUY:
- return (mbus_code == MEDIA_BUS_FMT_VYUY8_2X8);
- case V4L2_PIX_FMT_RGB555:
- return mbus_code == MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE;
- case V4L2_PIX_FMT_NV12_16L16:
- case V4L2_PIX_FMT_NV12:
- case V4L2_PIX_FMT_NV21:
- case V4L2_PIX_FMT_NV16:
- case V4L2_PIX_FMT_NV61:
- case V4L2_PIX_FMT_YUV420:
- case V4L2_PIX_FMT_YVU420:
- case V4L2_PIX_FMT_YUV422P:
- switch (mbus_code) {
- case MEDIA_BUS_FMT_UYVY8_2X8:
- case MEDIA_BUS_FMT_VYUY8_2X8:
- case MEDIA_BUS_FMT_YUYV8_2X8:
- case MEDIA_BUS_FMT_YVYU8_2X8:
- return true;
- default:
- dev_dbg(csi_dev->dev, "Unsupported mbus code: 0x%x\n",
- mbus_code);
- break;
- }
- break;
-
- case V4L2_PIX_FMT_RGB565:
- return (mbus_code == MEDIA_BUS_FMT_RGB565_2X8_LE);
- case V4L2_PIX_FMT_RGB565X:
- return (mbus_code == MEDIA_BUS_FMT_RGB565_2X8_BE);
-
- case V4L2_PIX_FMT_JPEG:
- return (mbus_code == MEDIA_BUS_FMT_JPEG_1X8);
-
- default:
- dev_dbg(csi_dev->dev, "Unsupported pixformat: 0x%x\n",
- pixformat);
- break;
- }
+ csi_dev->v4l2_dev = v4l2_dev;
+ csi_dev->media_dev = v4l2_dev->mdev;
- return false;
+ return sun6i_csi_capture_setup(csi_dev);
}
-int sun6i_csi_set_power(struct sun6i_csi_device *csi_dev, bool enable)
+static int sun6i_csi_isp_detect(struct sun6i_csi_device *csi_dev)
{
struct device *dev = csi_dev->dev;
- struct regmap *regmap = csi_dev->regmap;
- int ret;
-
- if (!enable) {
- regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0);
- pm_runtime_put(dev);
+ struct fwnode_handle *handle;
+ /*
+ * ISP is not available if not connected via fwnode graph.
+ * This will also check that the remote parent node is available.
+ */
+ handle = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
+ SUN6I_CSI_PORT_ISP, 0,
+ FWNODE_GRAPH_ENDPOINT_NEXT);
+ if (!handle)
return 0;
- }
-
- ret = pm_runtime_resume_and_get(dev);
- if (ret < 0)
- return ret;
- regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, CSI_EN_CSI_EN);
+ fwnode_handle_put(handle);
- return 0;
-}
-
-static enum csi_input_fmt get_csi_input_format(struct sun6i_csi_device *csi_dev,
- u32 mbus_code, u32 pixformat)
-{
- /* non-YUV */
|
[-]
[+]
|
Changed |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.h
^
|
@@ -1,176 +1,63 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
- * All rights reserved.
* Author: Yong Deng <yong.deng@magewell.com>
+ * Copyright 2021-2022 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
*/
-#ifndef __SUN6I_CSI_H__
-#define __SUN6I_CSI_H__
+#ifndef _SUN6I_CSI_H_
+#define _SUN6I_CSI_H_
#include <media/v4l2-device.h>
-#include <media/v4l2-fwnode.h>
-#include <media/v4l2-mc.h>
#include <media/videobuf2-v4l2.h>
-#include "sun6i_video.h"
+#include "sun6i_csi_bridge.h"
+#include "sun6i_csi_capture.h"
#define SUN6I_CSI_NAME "sun6i-csi"
#define SUN6I_CSI_DESCRIPTION "Allwinner A31 CSI Device"
+enum sun6i_csi_port {
+ SUN6I_CSI_PORT_PARALLEL = 0,
+ SUN6I_CSI_PORT_MIPI_CSI2 = 1,
+ SUN6I_CSI_PORT_ISP = 2,
+};
+
struct sun6i_csi_buffer {
struct vb2_v4l2_buffer v4l2_buffer;
struct list_head list;
-
- dma_addr_t dma_addr;
- bool queued_to_csi;
-};
-
-/**
- * struct sun6i_csi_config - configs for sun6i csi
- * @pixelformat: v4l2 pixel format (V4L2_PIX_FMT_*)
- * @code: media bus format code (MEDIA_BUS_FMT_*)
- * @field: used interlacing type (enum v4l2_field)
- * @width: frame width
- * @height: frame height
- */
-struct sun6i_csi_config {
- u32 pixelformat;
- u32 code;
- u32 field;
- u32 width;
- u32 height;
};
struct sun6i_csi_v4l2 {
struct v4l2_device v4l2_dev;
struct media_device media_dev;
- struct v4l2_async_notifier notifier;
};
struct sun6i_csi_device {
struct device *dev;
+ struct v4l2_device *v4l2_dev;
+ struct media_device *media_dev;
- struct sun6i_csi_config config;
struct sun6i_csi_v4l2 v4l2;
- struct sun6i_video video;
+ struct sun6i_csi_bridge bridge;
+ struct sun6i_csi_capture capture;
struct regmap *regmap;
struct clk *clock_mod;
struct clk *clock_ram;
struct reset_control *reset;
- int planar_offset[3];
+ bool isp_available;
};
struct sun6i_csi_variant {
unsigned long clock_mod_rate;
};
-struct sun6i_csi_async_subdev {
- struct v4l2_async_subdev asd; /* must be first */
-
- /* csi side video port settings for this subdev */
- struct v4l2_fwnode_endpoint vep;
-};
-
-/**
- * sun6i_csi_is_format_supported() - check if the format supported by csi
- * @csi_dev: pointer to the csi device
- * @pixformat: v4l2 pixel format (V4L2_PIX_FMT_*)
- * @mbus_code: media bus format code (MEDIA_BUS_FMT_*)
- * @vep: parsed CSI side bus endpoint configuration
- *
- * Return: true if format is supported, false otherwise.
- */
-bool sun6i_csi_is_format_supported(struct sun6i_csi_device *csi_dev,
- u32 pixformat, u32 mbus_code,
- struct v4l2_fwnode_endpoint *vep);
-
-/**
- * sun6i_csi_set_power() - power on/off the csi
- * @csi_dev: pointer to the csi device
- * @enable: on/off
- *
- * Return: 0 if successful, error code otherwise.
- */
-int sun6i_csi_set_power(struct sun6i_csi_device *csi_dev, bool enable);
-
-/**
- * sun6i_csi_update_config() - update the csi register settings
- * @csi_dev: pointer to the csi device
- * @config: see struct sun6i_csi_config
- * @vep: parsed CSI side bus endpoint configuration
- *
- * Return: 0 if successful, error code otherwise.
- */
-int sun6i_csi_update_config(struct sun6i_csi_device *csi_dev,
- struct sun6i_csi_config *config,
- struct v4l2_fwnode_endpoint *vep);
-
-/**
- * sun6i_csi_update_buf_addr() - update the csi frame buffer address
- * @csi_dev: pointer to the csi device
- * @addr: frame buffer's physical address
- */
-void sun6i_csi_update_buf_addr(struct sun6i_csi_device *csi_dev,
- dma_addr_t addr);
-
-/**
- * sun6i_csi_set_stream() - start/stop csi streaming
- * @csi_dev: pointer to the csi device
- * @enable: start/stop
- */
-void sun6i_csi_set_stream(struct sun6i_csi_device *csi_dev, bool enable);
-
-/* get bpp form v4l2 pixformat */
-static inline int sun6i_csi_get_bpp(unsigned int pixformat)
-{
- switch (pixformat) {
- case V4L2_PIX_FMT_SBGGR8:
- case V4L2_PIX_FMT_SGBRG8:
- case V4L2_PIX_FMT_SGRBG8:
- case V4L2_PIX_FMT_SRGGB8:
- case V4L2_PIX_FMT_JPEG:
- return 8;
- case V4L2_PIX_FMT_SBGGR10:
- case V4L2_PIX_FMT_SGBRG10:
- case V4L2_PIX_FMT_SGRBG10:
- case V4L2_PIX_FMT_SRGGB10:
- return 10;
- case V4L2_PIX_FMT_SBGGR12:
- case V4L2_PIX_FMT_SGBRG12:
- case V4L2_PIX_FMT_SGRBG12:
- case V4L2_PIX_FMT_SRGGB12:
- case V4L2_PIX_FMT_NV12_16L16:
- case V4L2_PIX_FMT_NV12:
- case V4L2_PIX_FMT_NV21:
- case V4L2_PIX_FMT_YUV420:
- case V4L2_PIX_FMT_YVU420:
- return 12;
- case V4L2_PIX_FMT_YUYV:
- case V4L2_PIX_FMT_YVYU:
- case V4L2_PIX_FMT_UYVY:
- case V4L2_PIX_FMT_VYUY:
- case V4L2_PIX_FMT_RGB555:
- case V4L2_PIX_FMT_NV16:
- case V4L2_PIX_FMT_NV61:
- case V4L2_PIX_FMT_YUV422P:
- case V4L2_PIX_FMT_RGB565:
- case V4L2_PIX_FMT_RGB565X:
- return 16;
- case V4L2_PIX_FMT_RGB24:
- case V4L2_PIX_FMT_BGR24:
- return 24;
- case V4L2_PIX_FMT_RGB32:
- case V4L2_PIX_FMT_BGR32:
- return 32;
- default:
- WARN(1, "Unsupported pixformat: 0x%x\n", pixformat);
- break;
- }
+/* ISP */
- return 0;
-}
+int sun6i_csi_isp_complete(struct sun6i_csi_device *csi_dev,
+ struct v4l2_device *v4l2_dev);
-#endif /* __SUN6I_CSI_H__ */
+#endif
|
[-]
[+]
|
Added |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.c
^
|
@@ -0,0 +1,847 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021-2022 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+ */
+
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-fwnode.h>
+
+#include "sun6i_csi.h"
+#include "sun6i_csi_bridge.h"
+#include "sun6i_csi_reg.h"
+
+/* Format */
+
+static const struct sun6i_csi_bridge_format sun6i_csi_bridge_formats[] = {
+ /* Bayer */
+ {
+ .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ /* RGB */
+ {
+ .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_BE,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+ /* YUV422 */
+ {
+ .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_YUYV,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_YVYU,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_UYVY,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_VYUY,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_YVYU,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_YUYV,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_UYVY,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_VYUY,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_VYUY,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_UYVY,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_YUYV,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_YVYU,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_UYVY,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_VYUY,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_YVYU,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_YUYV,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_UYVY,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_VYUY,
+ },
+ {
+ .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16,
+ .input_format = SUN6I_CSI_INPUT_FMT_YUV422,
+ .input_yuv_seq = SUN6I_CSI_INPUT_YUV_SEQ_VYUY,
+ .input_yuv_seq_invert = SUN6I_CSI_INPUT_YUV_SEQ_UYVY,
+ },
+ /* Compressed */
+ {
+ .mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
+ .input_format = SUN6I_CSI_INPUT_FMT_RAW,
+ },
+};
+
+const struct sun6i_csi_bridge_format *
+sun6i_csi_bridge_format_find(u32 mbus_code)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(sun6i_csi_bridge_formats); i++)
+ if (sun6i_csi_bridge_formats[i].mbus_code == mbus_code)
+ return &sun6i_csi_bridge_formats[i];
+
+ return NULL;
+}
+
+/* Bridge */
+
+static void sun6i_csi_bridge_irq_enable(struct sun6i_csi_device *csi_dev)
+{
+ struct regmap *regmap = csi_dev->regmap;
+
+ regmap_write(regmap, SUN6I_CSI_CH_INT_EN_REG,
+ SUN6I_CSI_CH_INT_EN_VS |
+ SUN6I_CSI_CH_INT_EN_HB_OF |
+ SUN6I_CSI_CH_INT_EN_FIFO2_OF |
+ SUN6I_CSI_CH_INT_EN_FIFO1_OF |
+ SUN6I_CSI_CH_INT_EN_FIFO0_OF |
+ SUN6I_CSI_CH_INT_EN_FD |
+ SUN6I_CSI_CH_INT_EN_CD);
+}
+
+static void sun6i_csi_bridge_irq_disable(struct sun6i_csi_device *csi_dev)
+{
+ struct regmap *regmap = csi_dev->regmap;
+
+ regmap_write(regmap, SUN6I_CSI_CH_INT_EN_REG, 0);
+}
+
+static void sun6i_csi_bridge_irq_clear(struct sun6i_csi_device *csi_dev)
+{
+ struct regmap *regmap = csi_dev->regmap;
+
+ regmap_write(regmap, SUN6I_CSI_CH_INT_EN_REG, 0);
+ regmap_write(regmap, SUN6I_CSI_CH_INT_STA_REG,
+ SUN6I_CSI_CH_INT_STA_CLEAR);
+}
+
+static void sun6i_csi_bridge_enable(struct sun6i_csi_device *csi_dev)
+{
+ struct regmap *regmap = csi_dev->regmap;
+
+ regmap_update_bits(regmap, SUN6I_CSI_EN_REG, SUN6I_CSI_EN_CSI_EN,
+ SUN6I_CSI_EN_CSI_EN);
+
+ regmap_update_bits(regmap, SUN6I_CSI_CAP_REG, SUN6I_CSI_CAP_VCAP_ON,
+ SUN6I_CSI_CAP_VCAP_ON);
+}
+
|
[-]
[+]
|
Added |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.h
^
|
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021-2022 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+ */
+
+#ifndef _SUN6I_CSI_BRIDGE_H_
+#define _SUN6I_CSI_BRIDGE_H_
+
+#include <media/v4l2-device.h>
+#include <media/v4l2-fwnode.h>
+
+#define SUN6I_CSI_BRIDGE_NAME "sun6i-csi-bridge"
+
+enum sun6i_csi_bridge_pad {
+ SUN6I_CSI_BRIDGE_PAD_SINK = 0,
+ SUN6I_CSI_BRIDGE_PAD_SOURCE = 1,
+ SUN6I_CSI_BRIDGE_PAD_COUNT = 2,
+};
+
+struct sun6i_csi_device;
+
+struct sun6i_csi_bridge_format {
+ u32 mbus_code;
+ u8 input_format;
+ u8 input_yuv_seq;
+ u8 input_yuv_seq_invert;
+};
+
+struct sun6i_csi_bridge_source {
+ struct v4l2_subdev *subdev;
+ struct v4l2_fwnode_endpoint endpoint;
+ bool expected;
+};
+
+struct sun6i_csi_bridge_async_subdev {
+ struct v4l2_async_subdev async_subdev;
+ struct sun6i_csi_bridge_source *source;
+};
+
+struct sun6i_csi_bridge {
+ struct v4l2_subdev subdev;
+ struct v4l2_async_notifier notifier;
+ struct media_pad pads[2];
+
+ struct sun6i_csi_bridge_source source_parallel;
+ struct sun6i_csi_bridge_source source_mipi_csi2;
+};
+
+/* Format */
+
+const struct sun6i_csi_bridge_format *
+sun6i_csi_bridge_format_find(u32 mbus_code);
+
+/* Bridge */
+
+int sun6i_csi_bridge_setup(struct sun6i_csi_device *csi_dev);
+void sun6i_csi_bridge_cleanup(struct sun6i_csi_device *csi_dev);
+
+#endif
|
[-]
[+]
|
Added |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_capture.c
^
|
@@ -0,0 +1,1155 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
+ * Author: Yong Deng <yong.deng@magewell.com>
+ * Copyright 2021-2022 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+ */
+
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-event.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-mc.h>
+#include <media/videobuf2-dma-contig.h>
+#include <media/videobuf2-v4l2.h>
+
+#include "sun6i_csi.h"
+#include "sun6i_csi_bridge.h"
+#include "sun6i_csi_capture.h"
+#include "sun6i_csi_reg.h"
+
+/* Helpers */
+
+#define SUN6I_BUS_FMTS(fmt...) (const u32[]) {fmt, 0}
+
+void sun6i_csi_capture_dimensions(struct sun6i_csi_device *csi_dev,
+ unsigned int *width, unsigned int *height)
+{
+ if (width)
+ *width = csi_dev->capture.format.fmt.pix.width;
+ if (height)
+ *height = csi_dev->capture.format.fmt.pix.height;
+}
+
+void sun6i_csi_capture_format(struct sun6i_csi_device *csi_dev,
+ u32 *pixelformat, u32 *field)
+{
+ if (pixelformat)
+ *pixelformat = csi_dev->capture.format.fmt.pix.pixelformat;
+
+ if (field)
+ *field = csi_dev->capture.format.fmt.pix.field;
+}
+
+/* Format */
+
+static const struct sun6i_csi_capture_format sun6i_csi_capture_formats[] = {
+ /* Bayer */
+ {
+ .pixelformat = V4L2_PIX_FMT_SBGGR8,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SBGGR8_1X8),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SGBRG8,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SGBRG8_1X8),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SGRBG8,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SGRBG8_1X8),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SRGGB8,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SRGGB8_1X8),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SBGGR10,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_10,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_10,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SBGGR10_1X10),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SGBRG10,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_10,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_10,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SGBRG10_1X10),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SGRBG10,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_10,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_10,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SGRBG10_1X10),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SRGGB10,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_10,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_10,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SRGGB10_1X10),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SBGGR12,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_12,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_12,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SBGGR12_1X12),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SGBRG12,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_12,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_12,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SGBRG12_1X12),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SGRBG12,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_12,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_12,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SGRBG12_1X12),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_SRGGB12,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_12,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_12,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_SRGGB12_1X12),
+ },
+ /* RGB */
+ {
+ .pixelformat = V4L2_PIX_FMT_RGB565,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RGB565,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RGB565,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_RGB565_2X8_LE),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_RGB565X,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RGB565,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RGB565,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_RGB565_2X8_BE),
+ },
+ /* YUV422 */
+ {
+ .pixelformat = V4L2_PIX_FMT_YUYV,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .input_format_raw = true,
+ .hsize_len_factor = 2,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_YUYV8_2X8,
+ MEDIA_BUS_FMT_YUYV8_1X16),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_YVYU,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .input_format_raw = true,
+ .hsize_len_factor = 2,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_YVYU8_2X8,
+ MEDIA_BUS_FMT_YVYU8_1X16),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_UYVY,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .input_format_raw = true,
+ .hsize_len_factor = 2,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_UYVY8_2X8,
+ MEDIA_BUS_FMT_UYVY8_1X16),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_VYUY,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_RAW_8,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_RAW_8,
+ .input_format_raw = true,
+ .hsize_len_factor = 2,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_VYUY8_2X8,
+ MEDIA_BUS_FMT_VYUY8_1X16),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_NV16,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_YUV422SP,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_YUV422SP,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_UYVY8_2X8,
+ MEDIA_BUS_FMT_UYVY8_1X16,
+ MEDIA_BUS_FMT_VYUY8_2X8,
+ MEDIA_BUS_FMT_VYUY8_1X16,
+ MEDIA_BUS_FMT_YUYV8_2X8,
+ MEDIA_BUS_FMT_YUYV8_1X16,
+ MEDIA_BUS_FMT_YVYU8_2X8,
+ MEDIA_BUS_FMT_YVYU8_1X16),
+ },
+ {
+ .pixelformat = V4L2_PIX_FMT_NV61,
+ .output_format_frame = SUN6I_CSI_OUTPUT_FMT_FRAME_YUV422SP,
+ .output_format_field = SUN6I_CSI_OUTPUT_FMT_FIELD_YUV422SP,
+ .input_yuv_seq_invert = true,
+ .mbus_codes = SUN6I_BUS_FMTS(MEDIA_BUS_FMT_UYVY8_2X8,
+ MEDIA_BUS_FMT_UYVY8_1X16,
+ MEDIA_BUS_FMT_VYUY8_2X8,
+ MEDIA_BUS_FMT_VYUY8_1X16,
+ MEDIA_BUS_FMT_YUYV8_2X8,
+ MEDIA_BUS_FMT_YUYV8_1X16,
+ MEDIA_BUS_FMT_YVYU8_2X8,
+ MEDIA_BUS_FMT_YVYU8_1X16),
+ },
+ {
|
[-]
[+]
|
Added |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_capture.h
^
|
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
+ * Author: Yong Deng <yong.deng@magewell.com>
+ * Copyright 2021-2022 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+ */
+
+#ifndef _SUN6I_CAPTURE_H_
+#define _SUN6I_CAPTURE_H_
+
+#include <media/v4l2-device.h>
+
+#define SUN6I_CSI_CAPTURE_NAME "sun6i-csi-capture"
+
+#define SUN6I_CSI_CAPTURE_WIDTH_MIN 32
+#define SUN6I_CSI_CAPTURE_WIDTH_MAX 4800
+#define SUN6I_CSI_CAPTURE_HEIGHT_MIN 32
+#define SUN6I_CSI_CAPTURE_HEIGHT_MAX 4800
+
+struct sun6i_csi_device;
+
+struct sun6i_csi_capture_format {
+ u32 pixelformat;
+ u8 output_format_field;
+ u8 output_format_frame;
+ bool input_yuv_seq_invert;
+ bool input_format_raw;
+ u32 hsize_len_factor;
+ const u32 *mbus_codes;
+};
+
+#undef current
+struct sun6i_csi_capture_state {
+ struct list_head queue;
+ spinlock_t lock; /* Queue and buffers lock. */
+
+ struct sun6i_csi_buffer *pending;
+ struct sun6i_csi_buffer *current;
+ struct sun6i_csi_buffer *complete;
+
+ unsigned int sequence;
+ bool streaming;
+ bool setup;
+};
+
+struct sun6i_csi_capture {
+ struct sun6i_csi_capture_state state;
+
+ struct video_device video_dev;
+ struct vb2_queue queue;
+ struct mutex lock; /* Queue lock. */
+ struct media_pad pad;
+
+ struct v4l2_format format;
+};
+
+/* Helpers */
+
+void sun6i_csi_capture_dimensions(struct sun6i_csi_device *csi_dev,
+ unsigned int *width, unsigned int *height);
+void sun6i_csi_capture_format(struct sun6i_csi_device *csi_dev,
+ u32 *pixelformat, u32 *field);
+
+/* Format */
+
+const
+struct sun6i_csi_capture_format *sun6i_csi_capture_format_find(u32 pixelformat);
+
+/* Capture */
+
+void sun6i_csi_capture_configure(struct sun6i_csi_device *csi_dev);
+void sun6i_csi_capture_state_update(struct sun6i_csi_device *csi_dev);
+
+/* State */
+
+void sun6i_csi_capture_sync(struct sun6i_csi_device *csi_dev);
+void sun6i_csi_capture_frame_done(struct sun6i_csi_device *csi_dev);
+
+/* Capture */
+
+int sun6i_csi_capture_setup(struct sun6i_csi_device *csi_dev);
+void sun6i_csi_capture_cleanup(struct sun6i_csi_device *csi_dev);
+
+#endif
|
[-]
[+]
|
Changed |
_service:tar_git:kernel-adaptation-pine64-6.1.0+git3.tar.bz2/linux/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_reg.h
^
|
@@ -1,196 +1,184 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (c) 2011-2018 Magewell Electronics Co., Ltd. (Nanjing)
- * All rights reserved.
* Author: Yong Deng <yong.deng@magewell.com>
+ * Copyright 2021-2022 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
*/
-#ifndef __SUN6I_CSI_REG_H__
-#define __SUN6I_CSI_REG_H__
+#ifndef _SUN6I_CSI_REG_H_
+#define _SUN6I_CSI_REG_H_
#include <linux/kernel.h>
-#define CSI_EN_REG 0x0
-#define CSI_EN_VER_EN BIT(30)
-#define CSI_EN_CSI_EN BIT(0)
-
-#define CSI_IF_CFG_REG 0x4
-#define CSI_IF_CFG_SRC_TYPE_MASK BIT(21)
-#define CSI_IF_CFG_SRC_TYPE_PROGRESSED ((0 << 21) & CSI_IF_CFG_SRC_TYPE_MASK)
-#define CSI_IF_CFG_SRC_TYPE_INTERLACED ((1 << 21) & CSI_IF_CFG_SRC_TYPE_MASK)
-#define CSI_IF_CFG_FPS_DS_EN BIT(20)
-#define CSI_IF_CFG_FIELD_MASK BIT(19)
-#define CSI_IF_CFG_FIELD_NEGATIVE ((0 << 19) & CSI_IF_CFG_FIELD_MASK)
-#define CSI_IF_CFG_FIELD_POSITIVE ((1 << 19) & CSI_IF_CFG_FIELD_MASK)
-#define CSI_IF_CFG_VREF_POL_MASK BIT(18)
-#define CSI_IF_CFG_VREF_POL_NEGATIVE ((0 << 18) & CSI_IF_CFG_VREF_POL_MASK)
-#define CSI_IF_CFG_VREF_POL_POSITIVE ((1 << 18) & CSI_IF_CFG_VREF_POL_MASK)
-#define CSI_IF_CFG_HREF_POL_MASK BIT(17)
-#define CSI_IF_CFG_HREF_POL_NEGATIVE ((0 << 17) & CSI_IF_CFG_HREF_POL_MASK)
-#define CSI_IF_CFG_HREF_POL_POSITIVE ((1 << 17) & CSI_IF_CFG_HREF_POL_MASK)
-#define CSI_IF_CFG_CLK_POL_MASK BIT(16)
-#define CSI_IF_CFG_CLK_POL_RISING_EDGE ((0 << 16) & CSI_IF_CFG_CLK_POL_MASK)
-#define CSI_IF_CFG_CLK_POL_FALLING_EDGE ((1 << 16) & CSI_IF_CFG_CLK_POL_MASK)
-#define CSI_IF_CFG_IF_DATA_WIDTH_MASK GENMASK(10, 8)
-#define CSI_IF_CFG_IF_DATA_WIDTH_8BIT ((0 << 8) & CSI_IF_CFG_IF_DATA_WIDTH_MASK)
-#define CSI_IF_CFG_IF_DATA_WIDTH_10BIT ((1 << 8) & CSI_IF_CFG_IF_DATA_WIDTH_MASK)
-#define CSI_IF_CFG_IF_DATA_WIDTH_12BIT ((2 << 8) & CSI_IF_CFG_IF_DATA_WIDTH_MASK)
-#define CSI_IF_CFG_MIPI_IF_MASK BIT(7)
-#define CSI_IF_CFG_MIPI_IF_CSI (0 << 7)
-#define CSI_IF_CFG_MIPI_IF_MIPI BIT(7)
-#define CSI_IF_CFG_CSI_IF_MASK GENMASK(4, 0)
-#define CSI_IF_CFG_CSI_IF_YUV422_INTLV ((0 << 0) & CSI_IF_CFG_CSI_IF_MASK)
-#define CSI_IF_CFG_CSI_IF_YUV422_16BIT ((1 << 0) & CSI_IF_CFG_CSI_IF_MASK)
-#define CSI_IF_CFG_CSI_IF_BT656 ((4 << 0) & CSI_IF_CFG_CSI_IF_MASK)
-#define CSI_IF_CFG_CSI_IF_BT1120 ((5 << 0) & CSI_IF_CFG_CSI_IF_MASK)
-
-#define CSI_CAP_REG 0x8
-#define CSI_CAP_CH0_CAP_MASK_MASK GENMASK(5, 2)
-#define CSI_CAP_CH0_CAP_MASK(count) (((count) << 2) & CSI_CAP_CH0_CAP_MASK_MASK)
-#define CSI_CAP_CH0_VCAP_ON BIT(1)
-#define CSI_CAP_CH0_SCAP_ON BIT(0)
-
-#define CSI_SYNC_CNT_REG 0xc
-#define CSI_FIFO_THRS_REG 0x10
-#define CSI_BT656_HEAD_CFG_REG 0x14
-#define CSI_PTN_LEN_REG 0x30
-#define CSI_PTN_ADDR_REG 0x34
-#define CSI_VER_REG 0x3c
-
-#define CSI_CH_CFG_REG 0x44
-#define CSI_CH_CFG_INPUT_FMT_MASK GENMASK(23, 20)
-#define CSI_CH_CFG_INPUT_FMT(fmt) (((fmt) << 20) & CSI_CH_CFG_INPUT_FMT_MASK)
-#define CSI_CH_CFG_OUTPUT_FMT_MASK GENMASK(19, 16)
-#define CSI_CH_CFG_OUTPUT_FMT(fmt) (((fmt) << 16) & CSI_CH_CFG_OUTPUT_FMT_MASK)
-#define CSI_CH_CFG_VFLIP_EN BIT(13)
-#define CSI_CH_CFG_HFLIP_EN BIT(12)
-#define CSI_CH_CFG_FIELD_SEL_MASK GENMASK(11, 10)
-#define CSI_CH_CFG_FIELD_SEL_FIELD0 ((0 << 10) & CSI_CH_CFG_FIELD_SEL_MASK)
-#define CSI_CH_CFG_FIELD_SEL_FIELD1 ((1 << 10) & CSI_CH_CFG_FIELD_SEL_MASK)
-#define CSI_CH_CFG_FIELD_SEL_BOTH ((2 << 10) & CSI_CH_CFG_FIELD_SEL_MASK)
-#define CSI_CH_CFG_INPUT_SEQ_MASK GENMASK(9, 8)
-#define CSI_CH_CFG_INPUT_SEQ(seq) (((seq) << 8) & CSI_CH_CFG_INPUT_SEQ_MASK)
-
-#define CSI_CH_SCALE_REG 0x4c
-#define CSI_CH_SCALE_QUART_EN BIT(0)
-
-#define CSI_CH_F0_BUFA_REG 0x50
-
-#define CSI_CH_F1_BUFA_REG 0x58
-
-#define CSI_CH_F2_BUFA_REG 0x60
-
-#define CSI_CH_STA_REG 0x6c
-#define CSI_CH_STA_FIELD_STA_MASK BIT(2)
-#define CSI_CH_STA_FIELD_STA_FIELD0 ((0 << 2) & CSI_CH_STA_FIELD_STA_MASK)
-#define CSI_CH_STA_FIELD_STA_FIELD1 ((1 << 2) & CSI_CH_STA_FIELD_STA_MASK)
-#define CSI_CH_STA_VCAP_STA BIT(1)
-#define CSI_CH_STA_SCAP_STA BIT(0)
-
-#define CSI_CH_INT_EN_REG 0x70
-#define CSI_CH_INT_EN_VS_INT_EN BIT(7)
-#define CSI_CH_INT_EN_HB_OF_INT_EN BIT(6)
-#define CSI_CH_INT_EN_MUL_ERR_INT_EN BIT(5)
-#define CSI_CH_INT_EN_FIFO2_OF_INT_EN BIT(4)
-#define CSI_CH_INT_EN_FIFO1_OF_INT_EN BIT(3)
-#define CSI_CH_INT_EN_FIFO0_OF_INT_EN BIT(2)
-#define CSI_CH_INT_EN_FD_INT_EN BIT(1)
-#define CSI_CH_INT_EN_CD_INT_EN BIT(0)
-
-#define CSI_CH_INT_STA_REG 0x74
-#define CSI_CH_INT_STA_VS_PD BIT(7)
-#define CSI_CH_INT_STA_HB_OF_PD BIT(6)
-#define CSI_CH_INT_STA_MUL_ERR_PD BIT(5)
-#define CSI_CH_INT_STA_FIFO2_OF_PD BIT(4)
-#define CSI_CH_INT_STA_FIFO1_OF_PD BIT(3)
-#define CSI_CH_INT_STA_FIFO0_OF_PD BIT(2)
-#define CSI_CH_INT_STA_FD_PD BIT(1)
-#define CSI_CH_INT_STA_CD_PD BIT(0)
-
-#define CSI_CH_FLD1_VSIZE_REG 0x78
-
-#define CSI_CH_HSIZE_REG 0x80
-#define CSI_CH_HSIZE_HOR_LEN_MASK GENMASK(28, 16)
-#define CSI_CH_HSIZE_HOR_LEN(len) (((len) << 16) & CSI_CH_HSIZE_HOR_LEN_MASK)
-#define CSI_CH_HSIZE_HOR_START_MASK GENMASK(12, 0)
-#define CSI_CH_HSIZE_HOR_START(start) (((start) << 0) & CSI_CH_HSIZE_HOR_START_MASK)
-
-#define CSI_CH_VSIZE_REG 0x84
-#define CSI_CH_VSIZE_VER_LEN_MASK GENMASK(28, 16)
-#define CSI_CH_VSIZE_VER_LEN(len) (((len) << 16) & CSI_CH_VSIZE_VER_LEN_MASK)
-#define CSI_CH_VSIZE_VER_START_MASK GENMASK(12, 0)
-#define CSI_CH_VSIZE_VER_START(start) (((start) << 0) & CSI_CH_VSIZE_VER_START_MASK)
-
-#define CSI_CH_BUF_LEN_REG 0x88
-#define CSI_CH_BUF_LEN_BUF_LEN_C_MASK GENMASK(29, 16)
-#define CSI_CH_BUF_LEN_BUF_LEN_C(len) (((len) << 16) & CSI_CH_BUF_LEN_BUF_LEN_C_MASK)
-#define CSI_CH_BUF_LEN_BUF_LEN_Y_MASK GENMASK(13, 0)
-#define CSI_CH_BUF_LEN_BUF_LEN_Y(len) (((len) << 0) & CSI_CH_BUF_LEN_BUF_LEN_Y_MASK)
-
-#define CSI_CH_FLIP_SIZE_REG 0x8c
-#define CSI_CH_FLIP_SIZE_VER_LEN_MASK GENMASK(28, 16)
-#define CSI_CH_FLIP_SIZE_VER_LEN(len) (((len) << 16) & CSI_CH_FLIP_SIZE_VER_LEN_MASK)
-#define CSI_CH_FLIP_SIZE_VALID_LEN_MASK GENMASK(12, 0)
-#define CSI_CH_FLIP_SIZE_VALID_LEN(len) (((len) << 0) & CSI_CH_FLIP_SIZE_VALID_LEN_MASK)
-
-#define CSI_CH_FRM_CLK_CNT_REG 0x90
-#define CSI_CH_ACC_ITNL_CLK_CNT_REG 0x94
-#define CSI_CH_FIFO_STAT_REG 0x98
-#define CSI_CH_PCLK_STAT_REG 0x9c
+#define SUN6I_CSI_ADDR_VALUE(a) ((a) >> 2)
-/*
- * csi input data format
- */
-enum csi_input_fmt {
- CSI_INPUT_FORMAT_RAW = 0,
- CSI_INPUT_FORMAT_YUV422 = 3,
- CSI_INPUT_FORMAT_YUV420 = 4,
-};
-
-/*
- * csi output data format
- */
-enum csi_output_fmt {
- /* only when input format is RAW */
- CSI_FIELD_RAW_8 = 0,
- CSI_FIELD_RAW_10 = 1,
- CSI_FIELD_RAW_12 = 2,
- CSI_FIELD_RGB565 = 4,
- CSI_FIELD_RGB888 = 5,
- CSI_FIELD_PRGB888 = 6,
- CSI_FRAME_RAW_8 = 8,
- CSI_FRAME_RAW_10 = 9,
- CSI_FRAME_RAW_12 = 10,
- CSI_FRAME_RGB565 = 12,
- CSI_FRAME_RGB888 = 13,
- CSI_FRAME_PRGB888 = 14,
-
- /* only when input format is YUV422 */
- CSI_FIELD_PLANAR_YUV422 = 0,
- CSI_FIELD_PLANAR_YUV420 = 1,
- CSI_FRAME_PLANAR_YUV420 = 2,
- CSI_FRAME_PLANAR_YUV422 = 3,
- CSI_FIELD_UV_CB_YUV422 = 4,
- CSI_FIELD_UV_CB_YUV420 = 5,
- CSI_FRAME_UV_CB_YUV420 = 6,
- CSI_FRAME_UV_CB_YUV422 = 7,
- CSI_FIELD_MB_YUV422 = 8,
- CSI_FIELD_MB_YUV420 = 9,
- CSI_FRAME_MB_YUV420 = 10,
- CSI_FRAME_MB_YUV422 = 11,
- CSI_FIELD_UV_CB_YUV422_10 = 12,
- CSI_FIELD_UV_CB_YUV420_10 = 13,
-};
-
-/*
- * csi YUV input data sequence
- */
-enum csi_input_seq {
- /* only when input format is YUV422 */
- CSI_INPUT_SEQ_YUYV = 0,
- CSI_INPUT_SEQ_YVYU,
- CSI_INPUT_SEQ_UYVY,
- CSI_INPUT_SEQ_VYUY,
-};
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